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Electronic Circuit Check","maintainers":[{"name":"ethan-chien","email":"liangtie.qian@gmail.com"}],"readme":"# PERC\r\n\r\nThis is the Programmable Electrical Rules Checking repository.\r\n\r\n## Key Points\r\n\r\n### EESchematic\r\n\r\n1. Pins are either power connections or belong to a uniquely-annotated symbol, so they don't need a path if they are driving the subgraph.\r\n2. PT_POWER_IN, ///< power input (GND, VCC for ICs). Must be connected to a power output.\r\n3. PT_POWER_OUT, ///< output of a regulator: intended to be connected to power input pins\r\n4. Using PWR_FLAG to tell ERC that the power input is intended to be connected to a regulator.\r\n\r\n### NetList\r\n\r\n1.  Connected component\r\n\r\nEach net is a [connected component](<https://en.wikipedia.org/wiki/Component_(graph_theory)>).\r\n\r\nhttps://github.com/bloominstituteoftechnology/Graphs.git\r\n\r\n## References\r\n\r\nhttps://www.synopsys.com/glossary/what-is-programmable-electrical-rules-checking.html\r\n\r\nhttps://www.allaboutcircuits.com/industry-articles/importance-of-advanced-erc-circuit-design\r\n\r\nhttps://aniah.fr\r\n\r\nhttps://semiconwiki.com/advanced-reliability-verification-mentors-calibre-perc/\r\n\r\nhttps://semiwiki.com/eda/2296-a-programmable-electrical-rule-checker/\r\n\r\nhttps://resources.pcb.cadence.com/blog/2023-electrical-rule-check\r\n\r\nhttps://eda.sw.siemens.com/en-US/ic/calibre-design/reliability-verification/perc/\r\n\r\nhttps://resources.pcb.cadence.com/blog/2023-electrical-rule-check\r\n\r\nhttps://zhuanlan.zhihu.com/p/674943393\r\n","readmeFilename":"README.md"}